TSMC's 2nm process (N2) achieved trial yields exceeding 70% earlier this year and has continued climbing, clearing the threshold required for Apple's iPhone 18 and MacBook M6 production. Volume production officially began in Q4 2025, and the company is tracking toward 100,000 monthly wafers by year-end 2026—a dramatic ramp from the initial 10,000-unit run. TSMC Chairman C.C. Wei stated that customer demand has surpassed internal projections, with both 2nm fabs in Taiwan fully booked for 2026. Apple has locked down more than half of the initial 2nm capacity for its A20/A20 Pro chips (iPhone 18 series) and M6 processors for MacBook Pro.
However, a critical supply-chain pinch has emerged: TSMC is sitting on approximately $1 billion worth of completed Apple A20 Pro SoCs that cannot advance to the next production phase due to a shortage of DRAM (specifically LPDDR5X memory). The chips completed wafer manufacture and Wafer-Level Multi-Chip Module packaging at TSMC's Fab 3 in July/August 2026 but are stuck awaiting DRAM shipments to complete the final assembly stage. Apple has negotiated with multiple suppliers, including Chinese manufacturer CXMT, but AI infrastructure customers are outbidding consumer-device OEMs for available LPDDR5X capacity, leaving iPhone production vulnerable to further delay if DRAM supply does not clear by September pre-order season.
For architects: the 70% yield on 2nm vindicates TSMC's process leadership over Samsung (~30%) and Intel's 18A (~10%), but the 2nm node's success is now bottlenecked by off-node memory supply, not fab capacity. This signals a structural shift in chip-design complexity: leading-edge compute nodes are shipping, but heterogeneous integration and advanced packaging now require coordinated multi-vendor supply chains. Organizations planning 2026 deployments with custom silicon should assume chip-memory co-scheduling friction and build inventory buffers.